Adyana, based in Santa Clara, California, provides leading edge, innovative EDA solutions to the digital, mixed-signal and analog IC market. Adyana has customers worldwide and partners with all the leading EDA vendors. Adyana's software is currently used by our customers in North America, Europe, Taiwan, China, Korea and Singapore.

Backend Flow Suite

Adyana's Backend Flow Suite (BFS) incorporates the most efficient algorithms and heuristics ever devised in the industry and provides sub-second performance in the full operational domain. BFS provides a critical link between RTL and GDSII, creating, comparing, documenting, analyzing and validating foundry-supplied models to silicon realizations. Differences between technology nodes and even other foundry processes can be assessed. The Adyana BFS allows engineering to tweak and optimize the entire backend flow in order to best reflect silicon data and meet designer's particular requirement for a specific type of deisgn. Adyana also provides top notch support, services and consultations on installing and using the BFS software. 

Full Domain Layout Optimizer

The Adyana Full Domain Layout Optimizer does what no other tool in the industry does - It optimizes the layout constantly in the background as the design is being brought through the backend steps. The optimization step can be completely avoided as a result of this constant optimization that is built into the process. A constant and full domain optimizer also means that there is a very tight correlation between placement, routing, power routing and layout export.

Deep Sub Micron and Nanometer Domain Excellence

All Adyana tools are very tightly integrated with the latest silicon manufacturing standards of deep sub-micron and nanometer lambda wavelengths. Process and lithography yields are maximized as a result of this tightly coupled and low lambda aware toolset.